Engineer I-CAD

Job Description

About Silicon Labs:

We are a leader in secure, intelligent wireless technology for a more connected world. Our integrated hardware and software platform, intuitive development tools, unmatched ecosystem and robust support make us the ideal long-term partner in building advanced industrial, commercial, home and life applications. We make it easy for developers to solve complex wireless challenges throughout the product lifecycle and get to market quickly with innovative solutions that transform industries, grow economies, and improve lives.

www.silabs.com

Job summary

As a senior member of our CAD team, you will determine, develop and support infrastructure needs and design flows for our rapidly growing IoT product division. This is a high visibility role, which requires fluid interaction with Silicon Labs’ CAD, DevOps, IT, IP, PDK, PV and Design teams. The candidate should have an excellent grasp of design data management practices, EDA tools, LSF, and diverse processes & platforms for deep submicron design and compute environments for chip design for modern hardware systems. Proven experience working on design and compute environments will be greatly preferred for this role.

Proven experience working across a range of process nodes from smaller geometries (22nm and below) to high voltage processes (0.5u) is critical for the role.

Education and Experience

MSEE (or equivalent) and 3+ years of industry experience

Key Qualifications

• Ideal candidate should have 3+ years of experience in chip design CAD with exposure to EDA tools from multiple vendors like Mentor, Cadence and Synopsys
• Strong programming skills in Python is a must for this role
• Programming experience in Perl, Tcl and Shell scripting experience would be desirable
• Sound knowledge of design flow from RTL to GDS
• Experience in using and administering FlexLM, IBM LSF
• Knowledge of  advanced usage of data management and version control tools like Perforce, Subversion, Cliosoft SOS, Methodics IPLM
• Knowledge of  EDA tool installation, access control mechanisms in multi-site Linux-based Secure Design Environments
• Experience with Cadence Virtuoso tools, Mentor Calibre will be definite plus
• Ability to work independently, drive decision-making, strong communication, and documentation skills are critical
• Familiarity with Analog and Digital design engineering concepts
• Excellent documentation and communication skills. Familiarity with Jira and Confluence is a plus
• • Cross-functional work experience like conducting impact analysis meetings with key stakeholders is required to succeed in this role